The present invention relates to a semiconductor device manufacturing method, and relates in particular to a method for manufacturing a semiconductor device having multiple types of gate oxide films having different thicknesses.
A conventional semiconductor device manufacturing method will now be described while referring to the drawings.
In the following explanation, a method is employed for manufacturing a semiconductor device wherein two oxide films having different thicknesses, i.e., a thick oxide film and a thin oxide film, are formed on a semiconductor substrate and a high-voltage MOS transistor is formed on the thick oxide film while a normal-voltage MOS transistor is formed on the thin oxide film.
First, according to the conventional LOCOS technique, an device separation film 102, which is a LOCOS film, is formed by oxidation, the area to avoid the oxidation is covered with an oxide film and a silicon nitride film that are formed on a conductive semiconductor substrate, i.e., a P-type silicon substrate 101 (see FIG. 17A).
Then, after the oxide film and the silicon nitride film are removed, as is shown in FIG. 17B, thermal oxidation is performed for the substrate 101 by using an device separation film 102 as a mask, and a thick gate oxide film 103 is formed thereon.
Next, as is shown in FIG. 17C, a photoresist film 104 is formed on a portion of the thick gate oxide film 103 (on the high-voltage MOS transistor formation area), and the other portion of the thick gate oxide film 103 (on the normal-voltage MOS transistor formation area) is removed by using as a mask the photoresist film 104.
Further, after the photoresist film 104 is removed, a thin gate oxide film 105 is formed by thermal oxidation, as is shown in FIG. 18A, on the normal-voltage MOS transistor formation area where the thick gate oxide film 103 is removed.
As is shown in FIG. 18B, a conductive film for a gate electrode is formed on the thick gate oxide film 103 and the thin gate oxide film 105, and is patterned to form gate electrodes 106A and 106B.
Furthermore, N-type impurity areas (source/drain areas 107, 108, 109 and 110) are formed adjacent to the gate electrodes 106A and 106B, and an interlayer insulating film (not shown) is formed to cover these areas. Then, a metal wire (not shown) is formed to contact the source/drain areas 107, 108, 109 and 110, via contact holes (not shown), so that a high-voltage MOS transistor is formed on the thick gate oxide film 103, while a normal-voltage MOS transistor is formed on the thin gate oxide film 105.
However, during this process, since in addition to the thick gate oxide film 103 the device separation film 102 is etched (see an arrow C in FIG. 17C), the device separation film 102 is thinned and the device separation is reduced.
Further, since the photoresist film 104 is used as a mask while the thick gate oxide film 103 is etched, the silicon substrate 101 is contaminated with organic material which is contained in the photoresist film 104. Thus, when the thin gate oxide film 105 is formed by thermal oxidation on the contaminated silicon substrate 101, deterioration of the quality of the thin gate oxide film 105 occurs.